JOB DETAILS
Principal Layout Engineer
CompanyNXP Semiconductors
LocationCatania
Work ModeOn Site
PostedSeptember 21, 2026
About The Company
We anticipate tomorrow’s needs—navigating a changing world by bringing together technology's brightest minds to build game-changing solutions that propel us forward.
NXP Semiconductors N.V. (NASDAQ: NXPI) is the trusted partner for innovative solutions in the automotive, industrial & IoT, mobile, and communications infrastructure markets. NXP's "Brighter Together" approach combines leading-edge technology with pioneering people to develop system solutions that make the connected world better, safer, and more secure. The company has operations in more than 30 countries and posted revenue of $12.61 billion in 2024. Find out more at www.nxp.com.
Career Development Opportunities : Bright Minds. Bright Futures.
We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.
Commitment At NXP.
We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.
Privacy Policy: https://www.nxp.com/company/about-nxp/privacy-policy-for-social-media-pages:PRIVACY-POLICY-SOCIAL-MEDIA
About the Role
Principal Analog Layout Engineer / Layout Lead
Job Description
NXP's Smart Analog Interfaces is seeking a highly motivated Principal Analog Layout Engineer to join a dynamic team developing state-of-the-art analog and high-speed interface products. This role offers the opportunity to work on complex mixed-signal ICs for leading consumer and automotive applications while contributing to innovative custom silicon solutions.
The successful candidate will serve as both an analog layout lead for custom analog-on-top and digital-on-top projects and a hands-on analog block layout designer, collaborating closely with circuit designers, physical design engineers, and cross-functional teams to deliver high-quality products from concept through tapeout.
Key Responsibilities
- Develop and lead block-level and top-level analog/mixed-signal layouts.
- Drive floorplanning, power routing, ESD implementation, and chip integration.
- Run and debug DRC, LVS, ERC, and extraction flows.
- Collaborate with design, digital P&R, IO, ESD, package, test, and PDK teams.
- Provide layout schedules, technical leadership, and customer communication.
- Identify layout risks and drive resolution of design and PDK issues.
- Improve layout methodologies and automation.
Qualifications
- BSEE or MSEE.
- 10+ years of custom analog/mixed-signal layout experience in deep sub-micron CMOS.
- Expert in Cadence Virtuoso XL, Floorplanning, Constraint Driven Layout, and PVS DRC/LVS/ERC.
- Strong knowledge of matching, common centroid, shielding, EM/IR, high-speed routing, parasitics, and DFM practices.
- Proven experience leading analog-on-top and digital-on-top chip layouts.
- Experience with floorplanning, power distribution, ESD, and multiple voltage domains.
- Familiarity with PLL, OSC, ADC, DAC, LDO, Bandgap, and high-speed interface circuits.
- Excellent communication and cross-functional leadership skills.
- Fluent in English
- SKILL or Perl scripting is a plus.
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NXP is committed to equal pay for equal work and work of equal value and applies fair, consistent and transparent remuneration practices.
As of the date of this posting, the estimated gross annual base salary range for this position in Italy is between 61,000 € and 83,900 € annually. This range is intended as a guideline. Actual compensation may vary based on qualifications, experience, skills, and specific business or organizational needs. This position falls under the applicable National Collective Labour Agreement (Metalmeccanica Industria). Where relevant, the total compensation package may also include additional elements such as annual incentive opportunities and/or equity, along with a competitive benefits package.More information about NXP in Italy...
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#LI-7795Key Skills
Analog layoutMixed-signal layoutCadence Virtuoso XLFloorplanningConstraint driven layoutPVS DRC/LVS/ERCDeep sub-micron CMOSMatchingCommon centroidShieldingEM/IRHigh-speed routingParasiticsDFM practicesSKILL scriptingPerl scripting
Categories
EngineeringTechnologyManufacturing
Benefits
Annual incentive opportunitiesEquityCompetitive benefits package
Job Information
📋Core Responsibilities
Lead block-level and top-level analog/mixed-signal layouts while driving floorplanning, power routing, and chip integration. Collaborate with cross-functional teams to ensure high-quality product delivery from concept through tapeout.
📋Job Type
full time
💰Salary Range
€61,000 - €83,900
📊Experience Level
10+
💼Company Size
22231
📊Visa Sponsorship
No
💼Language
English
🏢Working Hours
40 hours
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