JOB DETAILS
SoC Physical Designer
CompanyNXP Semiconductors
LocationTianjin
Work ModeOn Site
PostedOctober 12, 2026
About The Company
We anticipate tomorrow’s needs—navigating a changing world by bringing together technology's brightest minds to build game-changing solutions that propel us forward.
NXP Semiconductors N.V. (NASDAQ: NXPI) is the trusted partner for innovative solutions in the automotive, industrial & IoT, mobile, and communications infrastructure markets. NXP's "Brighter Together" approach combines leading-edge technology with pioneering people to develop system solutions that make the connected world better, safer, and more secure. The company has operations in more than 30 countries and posted revenue of $12.61 billion in 2024. Find out more at www.nxp.com.
Career Development Opportunities : Bright Minds. Bright Futures.
We believe that a key component to growing our business is to develop our people. To enable you to grow your career at NXP, we offer online and offline learning opportunities to help you develop some of your core and professional skills.
Commitment At NXP.
We recognize NXP is a powerful change agent as we continue to deliver innovative solutions that advance a more sustainable future. We remain steadfast in our commitment to sustainability and making measurable year-on-year progress. Also, we aim to create an inclusive work environment and we will not tolerate racism, discrimination or harassment of any kind. We have programs in place focused on diversity, inclusion and equality.
Privacy Policy: https://www.nxp.com/company/about-nxp/privacy-policy-for-social-media-pages:PRIVACY-POLICY-SOCIAL-MEDIA
About the Role
As a Graduate Physical Design Engineer, you will participate in the development of advanced semiconductor products and be involved in the complete physical implementation flow.
Your responsibilities include:
- Support SoC and subsystem physical design implementation from netlist to GDSII.
- Participate in floorplanning, power planning, placement, clock tree synthesis (CTS), routing, and chip finishing activities.
- Perform timing, power, signal integrity, and physical verification analysis.
- Debug design implementation issues and drive convergence toward project PPAC (Performance, Power, Area, Cost) targets.
- Work with cross-functional teams including RTL Design, DFT, Verification, IP, Package, and Technology teams.
- Develop and improve EDA automation scripts using Python, Tcl, or other scripting languages.
- Explore AI-assisted design methodologies to improve engineering productivity and design quality.
- Support silicon bring-up, design reviews, and tapeout activities.
- Contribute to continuous improvement of backend methodologies, flows, and best practices.
Qualifications：
- Master's degree (graduating in 2027) in:
- Microelectronics
- Integrated Circuit Design
- Electronic Engineering
- Computer Engineering
- Automation
- Related disciplines
- Basic knowledge of VLSI design flow and semiconductor fundamentals.
- Familiarity with Linux/Unix environments.
- Programming experience in Python, Tcl, Perl, Shell, or C/C++.
- Strong analytical and problem-solving skills.
- Good communication and teamwork skills.
- Fluent written and spoken English.
Preferred
- Coursework or project experience in:
- ASIC/SoC Design
- Physical Design
- Timing Analysis
- DFT
- Digital IC Design
- Hands-on experience with EDA tools such as:
- Synopsys Fusion Compiler
- ICC2
- PrimeTime
- Cadence Innovus
- Tempus
- Calibre
- Experience with machine learning or AI applications in semiconductor design.
- Publications, competitions, or research projects related to EDA or IC design are a plus.
#LI-6650
Key Skills
Physical DesignSoC DesignNetlist to GDSIIFloorplanningPower PlanningClock Tree SynthesisTiming AnalysisPhysical VerificationPythonTclLinuxSynopsys Fusion CompilerCadence InnovusDFTVLSI DesignMachine Learning
Categories
EngineeringTechnologySoftwareManufacturing
Job Information
📋Core Responsibilities
The engineer will support SoC physical design implementation from netlist to GDSII, including floorplanning, routing, and timing analysis. They will also collaborate with cross-functional teams to drive project PPAC targets and improve EDA automation scripts.
📋Job Type
full time
📊Experience Level
0-2
💼Company Size
22317
📊Visa Sponsorship
No
💼Language
English
🏢Working Hours
40 hours
Apply Now →
You'll be redirected to
the company's application page